Cadence Design Systems, Inc. (NASDAQ: CDNS) and United Microelectronics Corporation (NYSE: UMC; TWSE: 2303) (“UMC”), a leading global semiconductor foundry, today announced that the Cadence® analog/mixed-signal (AMS) IC design flow has achieved certification for UMC’s 28HPC+ process technology. With this certification, mutual Cadence and UMC customers have access to a comprehensive AMS solution for designing automotive, industrial internet of things (IoT) and artificial intelligence (AI) chips using 28HPC+ technology. The complete AMS flow, based on UMC’s Foundry Design Kit (FDK), includes an actual demonstration circuit with a highly automated circuit design, layout, signoff and verification flow that enables more seamless design on 28HPC+.
The Cadence AMS flow incorporates the proven custom/analog, digital and verification platforms, and supports the broader Cadence Intelligent System Design™ strategy, accelerating SoC design excellence. The AMS flow features integrated standard cell digital capabilities that are well suited for digitally assisted analog designs, and is an ideal solution for customers developing automotive, industrial IoT and AI applications using the 28HPC+ technology.
The complete, certified AMS flow includes the Virtuoso® Analog Design Environment (ADE), Virtuoso Schematic Editor, Virtuoso Layout Suite, Virtuoso Space-Based Router, Spectre® Accelerated Parallel Simulator (APS), Spectre AMS Designer with integrated Xcelium™ Parallel Logic Simulation, Voltus™-Fi Custom Power Integrity Solution, Innovus™ Implementation System, Quantus™ Extraction Solution and Physical Verification System (PVS). The flow provides the following:
- Front-end design: Provides corner, statistical and reliability simulation; circuit and device checks; and analog and mixed-signal simulation and verification management.
- Custom layout design: Offers an advanced, electromigration and parasitic-aware environment that includes schematic-driven layout and module generation, wire-editor and pin-to-trunk routing, symbolic placement, electrically aware design and voltage-dependent rules.
- Post-layout parasitic simulation and electromigration and IR drop (EM-IR) analysis and integrated signoff: Includes parasitic extraction, DRC, and layout versus schematic (LVS) checks.
- Mixed-Signal OpenAccess: Enables full interoperability between the Virtuoso and Innovus platforms operating on a single OpenAccess design database, enabling mixed-signal designers to seamlessly perform digital block implementation using Innovus tools directly from within the Virtuoso cockpit.
“In collaboration with UMC, Cadence has delivered a certified, integrated flow for AMS design at 28HPC+ technology based on Cadence’s industry-leading custom/analog, digital and signoff, and verification platforms,” said Wilbur Luo, vice president, product management in the Custom and PCB Group at Cadence. “This certification drives SoC design excellence and allows UMC customers to take advantage of the most advanced tool feature sets for circuit design, performance and reliability verification, automated layout, and block and chip integration, enabling them to design automotive, industrial IoT and AI applications with confidence.”
UMC’s production-ready 28HPC+ process utilizes a high-performance High-k/Metal Gate stack to support broad device options for increased flexibility and performance requirements, targeting a wide range of products such as application processors, cellular basebands, Wi-Fi, DTV/STB, mmWave, etc. The High-k-/metal gate stack and abundant options for core device Vt, various memory bit-cells and under drive/overdrive I/O capabilities help SoC designers realize unmatched cost, performance and battery life.
“Through our collaboration with Cadence, we have developed a comprehensive and unique offering that utilizes the Cadence AMS flow and a UMC design kit to offer a reliable and efficient flow for designing with our 28HPC+ process technology,” said T.H. Lin, director of the IP Development and Design Support division at UMC. “Leveraging the capabilities of this flow, which was created with the intention of providing detailed instructions so that users could improve productivity with UMC’s process, customers can deliver innovative, next-generation products to market faster.”
For more information on the Cadence AMS flow that supports the UMC 28HPC+ process technology, visit www.cadence.com/go/UMC28HPCp.
Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence software, hardware and semiconductor IP are used by customers to deliver products to market faster. The company’s Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine’s 100 Best Companies to Work For. Learn more at cadence.com.
UMC (NYSE: UMC; TWSE: 2303) is a leading global semiconductor foundry that provides advanced IC production for applications spanning every major sector of the electronics industry. UMC’s comprehensive foundry solutions enable chip designers to leverage the company’s sophisticated technology and manufacturing, which include world-class 28nm High-K/Metal Gate technology, 14nm FinFET volume production, specialty process platforms specifically developed for AI, 5G and IoT applications and the automotive industry’s highest-rated AEC-Q100 Grade-0 manufacturing capabilities for the production of ICs found in vehicles. UMC’s 11 wafer fabs are strategically located throughout Asia and are able to produce more than 600,000 wafers per month. The company employs approximately 18,500 people worldwide, with offices in Taiwan, China, Europe, Japan, Korea, Singapore, and the United States. UMC can be found on the web at http://www.umc.com.
Note from UMC Concerning Forward-Looking Statements
Some of the statements in the foregoing announcement are forward-looking within the meaning of the U.S. Federal Securities laws, including statements about introduction of new services and technologies, future outsourcing, competition, wafer capacity, business relationships and market conditions. Investors are cautioned that actual events and results could differ materially from these statements as a result of a variety of factors, including conditions in the overall semiconductor market and economy; acceptance and demand for products from UMC; and technological and development risks. Further information regarding these and other risks is included in UMC’s filings with the U.S. Securities and Exchange Commission. UMC does not undertake any obligation to update any forward-looking statement as a result of new information, future events or otherwise, except as required under applicable law.
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