The CCIX Consortium (CCIX®) announced the availability of CCIX Base Specification Revision 1.1 Version 1.0 with support for the PCI Express® Base Specification Revision 5.0 Version 1.0 and transfer speeds of 32GT/s. The CCIX Base Specification Revision 1.1 provides consortium members with a clear path forward to extend the benefits of CCIX to deliver increased performance, lower power needs and cost-optimized solutions demanded by today’s heterogeneous compute architectures.
The CCIX Base Specification Revision 1.1 is backwards compatible to the speeds supported in CCIX Base Specification 1.0 including the extended data rates of 25GT/s and 20GT/s and support for 16GT/s and below as defined by the PCIe® 4.0 specification. CCIX Base Specification Revision 1.1 also provides backward compatibility with previous CCIX specifications, allowing all CCIX-enabled devices built on CCIX Base Specification 1.0 to leverage existing server ecosystems, form factors, and software. The result lowers barriers to adoption of the next generation speeds while reducing the total cost of ownership (TCO) of accelerated systems.
“CCIX is enabling system designers to take advantage of the next generation PCIe 5.0 support at 32GT/s, while also taking advantage of cache coherency, additional bandwidth and reduced latency afforded by the CCIX specification,” said Gaurav Singh, CCIX Chairman. “The CCIX Consortium has also made sure that the CCIX specification is ready to support all future PCIe speeds to enable designers to adopt changes to the PCIe specification quickly.”
The CCIX specification is an interconnect standard which provides cache coherency for accelerators and memory expansion peripheral devices connecting to processors independent of the instruction set architectures (ISAs). Designed to leverage existing server communication technology, the CCIX specification can enhance the capabilities of existing server interconnects to enable coherency, reduce latency and increase bandwidth.
The CCIX specification utilizes PCI Express technology, allowing system architects to easily implement CCIX in alignment with current and future PCIe specifications and benefit from its evolving data rates. The CCIX specification builds on top of PCIe technology to allow interconnected heterogeneous components to access and share cache-coherent data to improve overall system performance.
CCIX Consortium Members can access the CCIX Base Specification Revision 1.1 via their member login at www.ccixconsortium.com.
See CCIX Base Specification Revision 1.1 products at Arm TechCon – CCIX Consortium Booth 930
Synopsys, a CCIX Consortium member, will be demonstrating its DesignWare CCIX Controller and PHY IP supporting the new CCIX Base Specification Revision 1.1 at 32GT/s.
CCIX Consortium members Arm and Xilinx will showcase the acceleration of Redis in-memory database with CCIX using the Arm Neoverse N1 System Development Platform with the Xilinx Alveo U280 Data Center Accelerator Card.
About CCIX Consortium, Inc.
CCIX Consortium was founded to enable a new class of interconnect focused on emerging acceleration applications such as machine learning, network processing, storage off-load, in-memory database and 4G/5G wireless technology. The standard allows processors based on different instruction set architectures to extend the benefits of cache coherent, peer processing to acceleration devices including FPGAs, GPUs, network/storage adapters, intelligent networks, and custom ASICs, allowing system designers to seamlessly integrate the right combination of heterogeneous components for their specific system needs. For more information, please visit www.ccixconsortium.com.