Press release

Concept Engineering Accelerates Semiconductor Development With Improved Customizable Debugging Platform

Sponsored by Businesswire

, the leader in visualization and debugging technology
for electronic circuits and systems, will unveil version 6.11 of the de
facto industry standard Vision debugging platform at the Design
Automation Conference
(DAC), being held June 3 – 6, 2019 at the Las
Vegas Convention Center, Las Vegas, NV.

Concept Engineering’s Vision
debugging platform
consists of the following individual tools:

  • StarVision®
    flagship tool which combines the debugging features of all
    individual Vision tools into one customizable mixed-signal and
    mixed-language tool.
  • RTLvision®
    for easy RTL code exploration, integration, debugging and
    intellectual property (IP) development.
  • SpiceVision®
    for advanced exploration and debugging features for
    transistor-level and post-layout debugging (SPICE-level).
  • GateVision®
    for full chip gate-level netlist debugging of complex SoC

The Vision tools provide powerful debugging and advanced flow automation
capabilities for the design of complex SoCs, ASICs, and mixed-signal

New Vision Debugging Platform features are:

  • An increase in tool performance and robustness when working with the
    largest and most complex SoC designs developed today.
  • The GUI cockpit now offers a flexible split-screen mode, where the
    system displays two different design views, side-by-side, allowing
    more comfortable debugging and cross-probing.
  • A new infobox GUI window provides a comprehensive report for selected
    objects including a compact visual connectivity report.
  • GUI improvements for easy and more efficient parasitic netlist
  • GUI cockpit offers improved drag-and-drop functionality from other
    applications (for improved interaction with other tools and existing
    tool flows).
  • Option to perform more relaxed Verilog and VHDL design parsing to
    better support incomplete or unfamiliar complex designs.
  • Improved SPICE netlist parser can automatically select proper macro
    models so that unfamiliar designs can be explored quicker and easier.
  • The Verilog netlist exporter has been improved to better support
    simulation tool flows.
  • Automatic logic recognition for SPICE netlists has been improved. As a
    result more compact and easier to understand schematic diagrams will
    be generated and allow faster and easier inspection of SPICE netlists.

“We are dedicated to continue to offer our customers significant
performance improvements year after year,” said Gerhard Angst, president
and CEO of Concept Engineering. “With version 6.11, our customers will
benefit from improved GUI for smoother and more efficient design
exploration and debug. Along with multiple improvements to support
development of complex mixed language SoCs.”

The company’s updated Vision platform, along with its visualization
engines and libraries for EDA tool developers (NIview, T-engine and
S-engine), will be demonstrated in the Concept Engineering booth #532 at
DAC 2019.


Version 6.11 Vision tools can be downloaded after DAC 2019 from the
company’s website

About Concept Engineering

Concept Engineering is a privately-held company based in Freiburg,
Germany, that provides visualization and debugging technology for
electronic circuits and systems, including automatic schematic
generation technology for all major design levels. The company’s
technology helps electronic design engineers to easily understand,
debug, optimize and document electronic designs. Concept Engineering’s
software technology is used in many fields in the EDA market, including:
RTL development, IP reuse, ASIC and SoC design, FPGA design,
analog/mixed-signal design, logic synthesis, design verification, test
automation, post-layout analysis, debugging and visualization at
system-, RTL-, netlist- and transistor-level.